ISO 26262-11: Safety Mechanisms for Embedded Memories: ECC, Scrubbing and BIST

Date
2027-04-26
Location
Online
Host
Zach L

About this event

A live 30-minute expert session on Safety Mechanisms for Embedded Memories: ECC, Scrubbing and BIST (ISO 26262-11 — Semiconductor Functional Safety). What We'll Cover: Where memory protection sits in the semiconductor technical safety concept and Part 11 memory guidance Step-by-step: choose SEC-DED vs DEC-TED, size scrubbing intervals against MBU rates, add address/control path protection How each mechanism earns DC in the FMEDA and the memory protection specification produced Common mistakes: crediting ECC for address decoder faults, no scrubbing so latent errors accumulate, uncorrectable-error handling undefined The DC rationale per memory instance and error-injection test evidence assessors check Related topics: ecc · sec-ded · memory scrubbing · mbist · embedded sram · address decoder

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About Functional Safety Foundations

This online session delivers expert-led instruction on the regulatory landscape and implementation approach for Functional Safety Foundations.

The cross-sector fundamentals underlying every functional safety standard: risk as severity × likelihood, the safety function concept, integrity levels, the safety lifecycle, and the split between random and systematic failures.

What it regulates

Shared vocabulary and reasoning: hazard → risk → risk reduction allocation → safety requirement → verified implementation → maintained integrity in operation.

Who must comply

Everyone entering the field — the conceptual base of the entire catalog.

Key requirements of Functional Safety Foundations

  • Hazard and risk fundamentals
  • Safety function anatomy: sensor-logic-actuator with defined safe state
  • Integrity ladders (SIL/PL/ASIL/DAL) as risk-reduction currencies
  • Random vs systematic failure treatment
  • Lifecycle and management of functional safety incl. competence

Key concepts: Functional Safety Foundations

Functional safety management
Planning, competence, documentation and assessment wrapped around technical work.
Random vs systematic
Hardware wear-out/chance failures quantified statistically versus design/process errors controlled by rigor.
Risk reduction allocation
Distributing required risk reduction among mechanical design, safeguards, control functions and procedures.
Safe state
The defined condition a function drives the equipment to on demand or fault.

Frequently asked questions: Functional Safety Foundations

Why can't testing alone prove safety?

Rare-event targets (like 1e-7/h) are unverifiable by test duration, and systematic errors evade random testing — hence the standards' dual machinery of quantified hardware analysis plus process rigor and independent assessment.

Standard information based on the published text of Functional Safety Foundations. Event content is provided by the host. For authoritative guidance, consult the official standard body.